1. Field of the Invention
This invention relates in general to the fabrication of semiconductor IC devices and, in particular, to a method of making trenches without undesirable top comers. More particularly, this invention relates to an adjustable method for eliminating trench top corners for preventing electric charge accumulation and the consequent damaging leakage current discharge.
2. Description of Related Art
Trenching is a technique widely employed for the isolation of circuit elements in the circuitry of semiconductor IC devices. For example, DRAM is a specific category of IC devices that employs the trench configuration to provide electrical isolation between consecutive transistors in the arrays of memory cells. Trenching can provide electrical isolation for circuit elements that requires less space than required by regional local oxidation. In the case of DRAMs, in addition to providing electrical isolation, trenches can also be used to construct storage capacitors for the memory cell units in the array. Such trenches are normally formed in processes requiring the use of certain special gaseous mixtures. These gaseous mixtures are controlled by some hardware equipment so that device substrate can be properly etched to form the trenches.
Dry etching is the traditional procedure widely used to make trenches in the device substrate. Plasma, rather than fluidic etching solution, is used to perform thin-film etching. One of the primary advantages of thin-film etching is that anisotropic etching can be achieved to have a greater etch consumption rate in the vertical direction than in the lateral. Since there is relatively much smaller etch consumption rate in the lateral orientation when compared with the vertical, the phenomenon of undercut is therefore avoided. Trenches obtained by anisotropic etching may therefore exhibit very straight trench sidewalls, with corners turning at an angle of nearly 90 degrees.
FIGS. 1a and 1b are a cross-sectional views showing the selected cross sections of the structural configuration of a trench together with its filled material as obtained in a conventional chemical-mechanical polishing procedure. As is illustrated in FIG. 1a, oxide layer 11 and silicon nitride layer 12 are subsequently formed on the device substrate 10. A photoresist layer is then formed covering the silicon nitride layer 12 which is then defined with specific patterns. The patterned photoresist layer is then used as the protective mask for implementing an anisotropic etching procedure to form the trenches 13. Afterwards, the photoresist layer is then removed.
Then, a layer of material 14 is formed covering the silicon nitride layer 12 as well as being filled in the trenches 13. A chemical-mechanical polishing (CMP) procedure is then employed to completely remove the entire silicon nitride layer 12 and the layer 14 on top, leaving the filled material 14 inside the trenches 13. The oxide layer 11 is also removed in the CMP procedure, resulting in the structural configuration as shown in FIG. 1b. Surface of the structure of FIG. 1b does not present a true flat plane.
Rather, shallow areas in the trench regions introduce top corners, as identified by reference numerals 15 in the drawing. These top corners 15 have turning angles nearly 90 degrees that can easily result in electric charge accumulation when the device substrate is energized, and leakage currents arise in these top corner areas as the fabricated IC device is processed further. In the subsequent fabrication procedural steps, whenever there are electrically conductive materials striding across the region where substrate 10 and the layer 14 meet each other, such leakage currents incur short-circuiting to degrade device reliability. Fabrication yield rate is therefore deteriorated, a phenomenon known as the kink effect.